The MMDTC114EE is an NPN Silicon Epitaxial Planar Digital Transistor designed with built-in bias resistors. This feature simplifies circuit design by reducing the quantity of external components and streamlining the manufacturing process. It is suitable for applications requiring digital switching and signal amplification.
| Parameter | Symbol | Value | Unit |
|---|---|---|---|
| Absolute Maximum Ratings (Ta = 25) | |||
| Collector Emitter Voltage | VCEO | 50 | V |
| Input Voltage | VI | -10 to +40 | V |
| Collector Current | IC | 100 | mA |
| Power Dissipation | Ptot | 150 | mW |
| Junction Temperature | Tj | 150 | |
| Storage Temperature Range | Tstg | -55 to +150 | |
| Characteristics at Ta = 25 | |||
| DC Current Gain at VCE = 5 V, IC = 5 mA | hFE | 30 | - |
| Collector Base Cutoff Current at VCB = 50 V | ICBO | - | 500 nA |
| Emitter Base Cutoff Current at VEB = 5 V | IEBO | - | 0.88 mA |
| Collector Emitter Saturation Voltage at IC = 10 mA, IB = 0.5 mA | VCE(sat) | - | 0.3 V |
| Input on Voltage at VCE = 0.3 V, IC = 10 mA | VI(on) | - | 3 V |
| Input off Voltage at VCE = 5 V, IC = 100 A | VI(off) | 0.5 | - V |
| Transition frequency at VCE = 10 V, -IE = 5 mA, f = 100 MHz | fT | - | 250 MHz |
| Input Resistance | R1 | 7 to 13 | K |
| Resistance Ratio | R2 / R1 | 0.8 to 1.2 | - |